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DSN
2002
IEEE
14 years 27 days ago
A Portable and Fault-Tolerant Microprocessor Based on the SPARC V8 Architecture
The architecture and implementation of the LEON-FT processor is presented. LEON-FT is a fault-tolerant 32-bit processor based on the SPARC V8 instruction set. The processors toler...
Jiri Gaisler
DAC
2011
ACM
12 years 7 months ago
Enabling system-level modeling of variation-induced faults in networks-on-chips
Process Variation (PV) is increasingly threatening the reliability of Networks-on-Chips. Thus, various resilient router designs have been recently proposed and evaluated. However,...
Konstantinos Aisopos, Chia-Hsin Owen Chen, Li-Shiu...
ICAC
2007
IEEE
14 years 2 months ago
Fault-Tolerant Reliable Delivery of Messages in Distributed Publish/Subscribe Systems
Reliable delivery of messages is an important problem that needs to be addressed in distributed systems. In this paper we present our strategy to enable reliable delivery of messa...
Shrideep Pallickara, Hasan Bulut, Geoffrey Fox
FMCAD
2008
Springer
13 years 9 months ago
A Theory of Mutations with Applications to Vacuity, Coverage, and Fault Tolerance
The quality of formal specifications and the circuits they are written for can be evaluated through checks such as vacuity and coverage. Both checks involve mutations to the specif...
Orna Kupferman, Wenchao Li, Sanjit A. Seshia
IOLTS
2006
IEEE
81views Hardware» more  IOLTS 2006»
14 years 1 months ago
Evaluating SEU and Crosstalk Effects in Network-on-Chip Routers
This work intends to evaluate the effect of a Single Event Upsets (SEUs) and crosstalk faults in a NoC router architecture by developing a fault injection mechanism, allowing an a...
Arthur Pereira Frantz, Luigi Carro, Érika F...