| This paper reports the design of BIST structures for sequential machines. Testability of an FSM is limited due to the fact that some machine states remain unreachable and some ac...
Samir Roy, Biplab K. Sikdar, Monalisa Mukherjee, D...
The system description language SystemC enables to quickly create executable specifications at adequate levbstraction for both hardware/software integration and fast design space...
We describe a method to clock the domino pipeline at the maximum rate by using soft synchronizers between pipeline stages and thus allowing "time borrowing," i.e., allow...
The presence of unknown values in the simulation result is a key barrier to effective output response compaction in practice. This paper proposes a simple circuit module, called a...
Mango Chia-Tso Chao, Seongmoon Wang, Srimat T. Cha...
Aggressive scaling of technology has an adverse impact on the reliability of VLSI circuits. Apart from increasing transient error susceptibility, the circuits also become more vul...