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» Fault emulation: a new approach to fault grading
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SIGSOFT
2006
ACM
14 years 8 months ago
Failure proximity: a fault localization-based approach
Recent software systems usually feature an automated failure reporting system, with which a huge number of failing traces are collected every day. In order to prioritize fault dia...
Chao Liu 0001, Jiawei Han
DFT
1999
IEEE
119views VLSI» more  DFT 1999»
14 years 6 days ago
RAMSES: A Fast Memory Fault Simulator
In this paper, we present a memory fault simulator called the Random Access Memory Simulator for Error Screening (RAMSES). Although it was designed based on some wellknown memory ...
Chi-Feng Wu, Chih-Tsun Huang, Cheng-Wen Wu
TCAD
2008
114views more  TCAD 2008»
13 years 7 months ago
Test-Quality/Cost Optimization Using Output-Deviation-Based Reordering of Test Patterns
At-speed functional testing, delay testing, and n-detection test sets are being used today to detect deep submicrometer defects. However, the resulting test data volumes are too hi...
Zhanglei Wang, Krishnendu Chakrabarty
ITC
1998
IEEE
77views Hardware» more  ITC 1998»
14 years 4 days ago
Deterministic BIST with multiple scan chains
A deterministic BIST scheme for circuits with multiple scan paths is presented. A procedure is described for synthesizing a pattern generator which stimulates all scan chains simu...
Gundolf Kiefer, Hans-Joachim Wunderlich
ASPDAC
2004
ACM
102views Hardware» more  ASPDAC 2004»
14 years 1 months ago
TranGen: a SAT-based ATPG for path-oriented transition faults
— This paper presents a SAT-based ATPG tool targeting on a path-oriented transition fault model. Under this fault model, a transition fault is detected through the longest sensit...
Kai Yang, Kwang-Ting Cheng, Li-C. Wang