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RECONFIG
2008
IEEE
225views VLSI» more  RECONFIG 2008»
14 years 3 months ago
A Hardware Filesystem Implementation for High-Speed Secondary Storage
Platform FPGAs are capable of hosting entire Linuxbased systems including standard peripherals, integrated network interface cards and even disk controllers on a single chip. File...
Ashwin A. Mendon, Ron Sass
ICES
2010
Springer
277views Hardware» more  ICES 2010»
13 years 7 months ago
An Efficient, High-Throughput Adaptive NoC Router for Large Scale Spiking Neural Network Hardware Implementations
Recently, a reconfigurable and biologically inspired paradigm based on network-on-chip (NoC) and spiking neural networks (SNNs) has been proposed as a new method of realising an ef...
Snaider Carrillo, Jim Harkin, Liam McDaid, Sandeep...
DATE
2008
IEEE
104views Hardware» more  DATE 2008»
14 years 3 months ago
Diagnostic Analysis of Static Errors in Multi-Step Analog to Digital Converters
– A new approach for diagnostic analysis of static errors in multi-step ADC based on the steepestdescent method is proposed. To set initial data, estimate the parameter update an...
Amir Zjajo, José Pineda de Gyvez
ISLPED
2005
ACM
68views Hardware» more  ISLPED 2005»
14 years 2 months ago
Two efficient methods to reduce power and testing time
Reducing power dissipation and testing time is accomplished by forming two clusters of don’t-care bit inside an input and a response test cube. New reordering scheme of scan lat...
Il-soo Lee, Tony Ambler
FPGA
2004
ACM
174views FPGA» more  FPGA 2004»
14 years 2 months ago
A compiled accelerator for biological cell signaling simulations
The simulation of large systems of biochemical reactions is a key part of research into molecular signaling and information processing in biological cells. However, it can be impr...
John F. Keane, Christopher Bradley, Carl Ebeling