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» Fault simulation on reconfigurable hardware
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ISCA
2006
IEEE
123views Hardware» more  ISCA 2006»
13 years 9 months ago
A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks
Packet-based on-chip networks are increasingly being adopted in complex System-on-Chip (SoC) designs supporting numerous homogeneous and heterogeneous functional blocks. These Net...
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Par...
PRDC
2007
IEEE
14 years 3 months ago
PAI: A Lightweight Mechanism for Single-Node Memory Recovery in DSM Servers
Several recent studies identify the memory system as the most frequent source of hardware failures in commercial servers. Techniques to protect the memory system from failures mus...
Jangwoo Kim, Jared C. Smolens, Babak Falsafi, Jame...
ISCAS
2006
IEEE
112views Hardware» more  ISCAS 2006»
14 years 3 months ago
Fine-grain thermal profiling and sensor insertion for FPGAs
– Increasing logic densities and clock frequencies on FPGAs lead to rapid increase in power density, which translates to higher on-chip temperature. In this paper, we investigate...
Somsubhra Mondal, Rajarshi Mukherjee, Seda Ogrenci...
FPGA
2001
ACM
139views FPGA» more  FPGA 2001»
14 years 1 months ago
A memory coherence technique for online transient error recovery of FPGA configurations
The partial reconfiguration feature of some of the currentgeneration Field Programmable Gate Arrays (FPGAs) can improve dependability by detecting and correcting errors in onchip ...
Wei-Je Huang, Edward J. McCluskey
HPCC
2010
Springer
13 years 9 months ago
A Generic Execution Management Framework for Scientific Applications
Managing the execution of scientific applications in a heterogeneous grid computing environment can be a daunting task, particularly for long running jobs. Increasing fault tolera...
Tanvire Elahi, Cameron Kiddle, Rob Simmonds