372 search results - page 58 / 75 » Fault simulation on reconfigurable hardware |
FPL
2005
Springer
14 years 1 months ago
2005
Springer
Current FPGA placement algorithms estimate the routability of a placement using architecture-specific metrics. The shortcoming of using architecture-specific routability estimates ...
ACSD
2009
IEEE
14 years 2 months ago
2009
IEEE
The SpiNNaker project aims to develop parallel computer systems with more than a million embedded processors. The goal of the project is to support largescale simulations of syste...
DATE
1999
IEEE
14 years 7 days ago
1999
IEEE
In this paper we propose an efficient transient test generation method to comprehensively test analog circuits using minimum test time. A divide and conquer strategy is formulated...
ICCAD
2000
IEEE
14 years 10 days ago
2000
IEEE
We present an error catch and analysis (ECA) system for semiconductor memories. The system consists of a test algorithm generator called TAGS, a fault simulator called RAMSES, and...
DATE
1998
IEEE
14 years 6 days ago
1998
IEEE
We extend the subsequence removal technique to provide signi cantly higher static compaction for sequential circuits. We show that state relaxation techniques can be used to ident...