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VLSID
2001
IEEE
82views VLSI» more  VLSID 2001»
14 years 7 months ago
Efficient Signature-Based Fault Diagnosis Using Variable Size Windows
A technique for signature based diagnosis using windows of different sizes is presented. It allows to obtain increased diagnostic information from a given test at a lower cost, wi...
Thomas Clouqueur, Ozen Ercevik, Kewal K. Saluja, H...
VTS
2007
IEEE
100views Hardware» more  VTS 2007»
14 years 1 months ago
Using Scan-Dump Values to Improve Functional-Diagnosis Methodology
In this paper, we identify two main bottlenecks in the functional diagnosis flow and propose new ways to overcome these. Our approach completely eliminates the “Primary Input (P...
Vishnu C. Vimjam, Enamul Amyeen, Ruifeng Guo, Srik...
ITC
2003
IEEE
153views Hardware» more  ITC 2003»
14 years 22 days ago
An Efficient and Effective Methodology on the Multiple Fault Diagnosis
In this paper, we analyze failing circuits and propose a multiple-fault diagnosis approach. Our methodology has been validated experimentally and has proved to be highly efficient...
Zhiyuan Wang, Kun-Han Tsai, Malgorzata Marek-Sadow...
DATE
2006
IEEE
88views Hardware» more  DATE 2006»
14 years 1 months ago
Timing-reasoning-based delay fault diagnosis
In this paper, we propose a timing-reasoning algorithm to improve the resolution of delay fault diagnosis. In contrast to previous approaches which identify candidates by utilizin...
Kai Yang, Kwang-Ting Cheng
DFT
2002
IEEE
79views VLSI» more  DFT 2002»
14 years 13 days ago
Gate-Delay Fault Diagnosis Using the Inject-and-Evaluate Paradigm
We propose an algorithm for gate-delay fault diagnosis. It is based on the inject-and-evaluate paradigm [1], in which the fault site(s) are predicted through a series of injection...
Horng-Bin Wang, Shi-Yu Huang, Jing-Reng Huang