172 search results - page 10 / 35 » FinFET-based SRAM design |
ATS
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper, we develop a method to analyze the probability of access failure in SRAM array (due to random Vt variation in transistors) by jointly considering variations in cell...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
In this paper, we have analyzed ond modeled the fiilure probabilities ofSRAM cells due to process parameter variations. A method to predict the yield of a memoiy chip based on the...
ISQED
2006
IEEE
14 years 1 months ago
2006
IEEE
— Negative Bias Temperature Instability (NBTI) has the potential to become one of the main show-stoppers of circuit reliability in nanometer scale devices due to its deleterious ...
ISLPED
2005
ACM
14 years 1 months ago
2005
ACM
This paper studies the impact on energy efficiency and thermal behavior of design style and clock-gating style in queue and array structures. These structures are major sources of...
MTDT
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper highlights the cell current characterization of a low leakage 6T SRAM by adjusting the threshold voltages of the transistors in the memory array to reduce the standby p...