Sciweavers

56 search results - page 6 / 12
» FinFETs for nanoscale CMOS digital integrated circuits
Sort
View
DATE
2008
IEEE
79views Hardware» more  DATE 2008»
14 years 1 months ago
A Programmable and Low-EMI Integrated Half-Bridge Driver in BCD Technology
This paper presents the design and the laboratory results of an integrated half-bridge driver for power electronic systems in a 0.35 µm Bipolar CMOS DMOS (BCD) technology. The pr...
Francesco D'Ascoli, Luca Bacciarelli, Massimiliano...
ICCAD
2002
IEEE
154views Hardware» more  ICCAD 2002»
14 years 4 months ago
Concurrent flip-flop and repeater insertion for high performance integrated circuits
For many years, CMOS process scaling has allowed a steady increase in the operating frequency and integration density of integrated circuits. Only recently, however, have we reach...
Pasquale Cocchini
CICC
2011
106views more  CICC 2011»
12 years 7 months ago
A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons
Efforts to achieve the long-standing dream of realizing scalable learning algorithms for networks of spiking neurons in silicon have been hampered by (a) the limited scalability of...
Jae-sun Seo, Bernard Brezzo, Yong Liu, Benjamin D....
ICCAD
2008
IEEE
246views Hardware» more  ICCAD 2008»
14 years 4 months ago
Integrated circuit design with NEM relays
—To overcome the energy-efficiency limitations imposed by finite sub-threshold slope in CMOS transistors, this paper explores the design of integrated circuits based on nanoelect...
Fred Chen, Hei Kam, Dejan Markovic, Tsu-Jae King L...
DATE
2003
IEEE
90views Hardware» more  DATE 2003»
14 years 19 days ago
Transistor-Level Static Timing Analysis by Piecewise Quadratic Waveform Matching
While fast timing analysis methods, such as asymptotic waveform evaluation (AWE), have been well established for linear circuits, the timing analysis for non-linear circuits, whic...
Zhong Wang, Jianwen Zhu