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VLSID
2002
IEEE
142views VLSI» more  VLSID 2002»
14 years 9 months ago
Degree-of-Freedom Analysis for Sequential Machines Targeting BIST Quality and Gate Area
| This paper reports the design of BIST structures for sequential machines. Testability of an FSM is limited due to the fact that some machine states remain unreachable and some ac...
Samir Roy, Biplab K. Sikdar, Monalisa Mukherjee, D...
CASES
2006
ACM
14 years 9 days ago
State space reconfigurability: an implementation architecture for self modifying finite automata
Many embedded systems exhibit temporally and behaviorally disjoint behavior slices. When such behaviors are captured by state machines, the current design flow will capture it as ...
Ka-Ming Keung, Akhilesh Tyagi
ISLPED
1998
ACM
94views Hardware» more  ISLPED 1998»
14 years 24 days ago
Theoretical bounds for switching activity analysis in finite-state machines
- The objective of this paper is to provide lower and upper bounds for the switching activity on the state lines in Finite State Machines (FSMs). Using a Markov chain model for the...
Diana Marculescu, Radu Marculescu, Massoud Pedram
EH
1999
IEEE
351views Hardware» more  EH 1999»
14 years 27 days ago
Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints
Here we advocate an approach to learning hardware based on induction of finite state machines from temporal logic constraints. The method involves training on examples, constraint...
Marek A. Perkowski, Alan Mishchenko, Anatoli N. Ch...
ACL
1996
13 years 10 months ago
Head Automata and Bilingual Tiling: Translation with Minimal Representations
We present a language model consisting of a collection of costed bidirectional finite state automata associated with the head words of phrases. The model is suitable for increment...
Hiyan Alshawi