1563 search results - page 19 / 313 » Flexible instruction processors |
IEEEPACT
2007
IEEE
14 years 4 months ago
2007
IEEE
Many sorting algorithms have been studied in the past, but there are only a few algorithms that can effectively exploit both SIMD instructions and threadlevel parallelism. In this...
MICRO
2003
IEEE
14 years 3 months ago
2003
IEEE
Large instruction window processors achieve high performance by exposing large amounts of instruction level parallelism. However, accessing large hardware structures typically req...
MICRO
1997
IEEE
14 years 2 months ago
1997
IEEE
We propose a method for compressing programs in embedded processors where instruction memory size dominates cost. A post-compilation analyzer examines a program and replaces commo...
IPPS
2006
IEEE
14 years 3 months ago
2006
IEEE
A design process is presented for the selection of a set of instruction set extensions for the PowerPC 405 processor that is embedded into the Xilinx Virtex Family of FPGAs. The i...
GLVLSI
1998
IEEE
14 years 2 months ago
1998
IEEE
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...