1563 search results - page 27 / 313 » Flexible instruction processors |
MICRO
2003
IEEE
14 years 3 months ago
2003
IEEE
Application-specific extensions to the computational capabilities of a processor provide an efficient mechanism to meet the growing performance and power demands of embedded appl...
ASAP
2010
IEEE
13 years 8 months ago
2010
IEEE
Abstract--This paper proposes an FPGA-based applicationspecific elliptic curve processor over a prime field. This research targets applications for which compactness is more import...
IPPS
2003
IEEE
14 years 3 months ago
2003
IEEE
The available Instruction Level Parallelism in Java bytecode (Java-ILP) is not readily exploitable using traditional in-order or out-of-order issue mechanisms due to dependencies ...
ASPLOS
2006
ACM
14 years 3 months ago
2006
ACM
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
MICRO
1991
IEEE
14 years 1 months ago
1991
IEEE
This paper examines two alternative approaches to supporting code scheduling for multiple-instruction-issue processors. One is to provide a set of non-trapping instructions so tha...