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ACMMSP
2006
ACM
247views Hardware» more  ACMMSP 2006»
14 years 3 months ago
A flexible data to L2 cache mapping approach for future multicore processors
This paper proposes and studies a distributed L2 cache management approach through page-level data to cache slice mapping in a future processor chip comprising many cores. L2 cach...
Lei Jin, Hyunjin Lee, Sangyeun Cho
GRID
2008
Springer
13 years 11 months ago
Rescheduling co-allocation requests based on flexible advance reservations and processor remapping
Large-scale computing environments, such as TeraGrid, Distributed ASCI Supercomputer (DAS), and Grid’5000, have been using resource co-allocation to execute applications on mult...
Marco Aurélio Stelmar Netto, Rajkumar Buyya
DATE
2009
IEEE
97views Hardware» more  DATE 2009»
14 years 4 months ago
A flexible floating-point wavelet transform and wavelet packet processor
—The richness of wavelet transformation is known in many fields. There exist different classes of wavelet filters that can be used depending on the application. In this paper, ...
Andre Guntoro, Manfred Glesner
CODES
2005
IEEE
14 years 3 months ago
Future processors: flexible and modular
The ability to continue increasing processor frequency and single thread performance is being severely limited by exponential increases in leakage and active power. To continue to...
Charlie Johnson, Jeff Welser
DAC
2005
ACM
14 years 11 months ago
Flexible ASIC: shared masking for multiple media processors
ASIC provides more than an order of magnitude advantage in terms of density, speed, and power requirement per gate. However, economic (cost of masks) and technological (deep micro...
Jennifer L. Wong, Farinaz Koushanfar, Miodrag Potk...