Sciweavers

1446 search results - page 105 / 290
» Formal analysis of hardware requirements
Sort
View
ICCAD
2006
IEEE
107views Hardware» more  ICCAD 2006»
14 years 6 months ago
Current path analysis for electrostatic discharge protection
The electrostatic discharge (ESD) problem has become a challenging reliability issue in nanometer circuit design. High voltages resulted from ESD might cause high current densitie...
Hung-Yi Liu, Chung-Wei Lin, Szu-Jui Chou, Wei-Ting...
ICCAD
2001
IEEE
100views Hardware» more  ICCAD 2001»
14 years 6 months ago
Coupled Analysis of Electromigration Reliability and Performance in ULSI Signal Nets
In deep submicron VLSI circuits, interconnect reliability due to electromigration and thermal effects is fast becoming a serious design issue particularly for long signal lines. T...
Kaustav Banerjee, Amit Mehrotra
ISQED
2005
IEEE
92views Hardware» more  ISQED 2005»
14 years 3 months ago
An Interconnect Insensitive Linear Time-Varying Driver Model for Static Timing Analysis
This paper presents a two-step, RC-interconnect insensitive linear time-varying (LTV) driver model for gate-level timing calculation. We show how to characterize a driver with the...
Chung-Kuan Tsai, Malgorzata Marek-Sadowska
CARDIS
2010
Springer
187views Hardware» more  CARDIS 2010»
14 years 4 months ago
Improved Fault Analysis of Signature Schemes
At ACISP 2004, Giraud and Knudsen presented the first fault analysis of DSA, ECDSA, XTR-DSA, Schnorr and ElGamal signatures schemes that considered faults affecting one byte. The...
Christophe Giraud, Erik Woodward Knudsen, Michael ...
CODES
2007
IEEE
14 years 4 months ago
Complex task activation schemes in system level performance analysis
The design and analysis of today’s complex real-time systems requires advanced methods. Due to ever growing functionality, hardware complexity and component interaction, applyin...
Wolfgang Haid, Lothar Thiele