1446 search results - page 105 / 290 » Formal analysis of hardware requirements |
129
click to vote
ICCAD
2006
IEEE
16 years 2 months ago
2006
IEEE
The electrostatic discharge (ESD) problem has become a challenging reliability issue in nanometer circuit design. High voltages resulted from ESD might cause high current densitie...
121
click to vote
ICCAD
2001
IEEE
16 years 2 months ago
2001
IEEE
In deep submicron VLSI circuits, interconnect reliability due to electromigration and thermal effects is fast becoming a serious design issue particularly for long signal lines. T...
132
click to vote
ISQED
2005
IEEE
15 years 11 months ago
2005
IEEE
This paper presents a two-step, RC-interconnect insensitive linear time-varying (LTV) driver model for gate-level timing calculation. We show how to characterize a driver with the...
144
click to vote
CARDIS
2010
Springer
16 years 18 days ago
2010
Springer
At ACISP 2004, Giraud and Knudsen presented the first fault analysis of DSA, ECDSA, XTR-DSA, Schnorr and ElGamal signatures schemes that considered faults affecting one byte. The...
160
click to vote
CODES
2007
IEEE
16 years 3 days ago
2007
IEEE
The design and analysis of today’s complex real-time systems requires advanced methods. Due to ever growing functionality, hardware complexity and component interaction, applyin...