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» Formal analysis of hardware requirements
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DATE
2006
IEEE
140views Hardware» more  DATE 2006»
14 years 4 months ago
A hybrid framework for design and analysis of fault-tolerant architectures
It is anticipated that self assembled ultra-dense nanomemories will be more susceptible to manufacturing defects and transient faults than conventional CMOS-based memories, thus t...
Debayan Bhaduri, Sandeep K. Shukla, Deji Coker, Va...
ITC
2000
IEEE
88views Hardware» more  ITC 2000»
14 years 2 months ago
Predicting device performance from pass/fail transient signal analysis data
Transient Signal Analysis (TSA) is a Go/No-Go device testing method that is based on the analysis of voltage transients at multiple test points. In this paper, a technique based o...
James F. Plusquellic, Amy Germida, Jonathan Hudson...
CARDIS
2008
Springer
119views Hardware» more  CARDIS 2008»
14 years 10 days ago
Static Program Analysis for Java Card Applets
The Java Card API provides a framework of classes and interfaces that hides the details of the underlying smart card interface, thus relieving developers from going through the swa...
Vasilios Almaliotis, Alexandros Loizidis, Panagiot...
ICCAD
2008
IEEE
106views Hardware» more  ICCAD 2008»
14 years 7 months ago
Process variability-aware transient fault modeling and analysis
– Due to reduction in device feature size and supply voltage, the sensitivity of digital systems to transient faults is increasing dramatically. As technology scales further, the...
Natasa Miskov-Zivanov, Kai-Chiang Wu, Diana Marcul...
ICCAD
2005
IEEE
90views Hardware» more  ICCAD 2005»
14 years 7 months ago
Scalable compositional minimization via static analysis
State-equivalence based reduction techniques, e.g. bisimulation minimization, can be used to reduce a state transition system to facilitate subsequent verification tasks. However...
Fadi A. Zaraket, Jason Baumgartner, Adnan Aziz