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» Formal analysis of hardware requirements
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ISQED
2005
IEEE
98views Hardware» more  ISQED 2005»
14 years 4 months ago
A More Effective CEFF
Precise chip-level timing requires careful modeling of the interaction between logic drivers and interconnect. Existing static-timing analysis methodologies generate models for dr...
Sani R. Nassif, Zhuo Li
ASPDAC
2006
ACM
726views Hardware» more  ASPDAC 2006»
14 years 2 months ago
Newton: a library-based analytical synthesis tool for RF-MEMS resonators
Newton is a library-based CAD tool with an analytical synthesis engine which has been developed to support the direct synthesis of the physical design and an electromechanically eq...
Michael S. McCorquodale, James L. McCann, Richard ...
CAV
2008
Springer
143views Hardware» more  CAV 2008»
14 years 12 days ago
Applying the Graph Minor Theorem to the Verification of Graph Transformation Systems
We show how to view certain subclasses of (single-pushout) graph transformation systems as well-structured transition systems, which leads to decidability of the covering problem v...
Salil Joshi, Barbara König
ICECCS
2009
IEEE
166views Hardware» more  ICECCS 2009»
13 years 8 months ago
ASIIST: Application Specific I/O Integration Support Tool for Real-Time Bus Architecture Designs
In hard real-time systems such as avionics, computer board level designs are typically customized to meet specific reliability and real time requirements. This paper focuses on co...
Min-Young Nam, Rodolfo Pellizzoni, Lui Sha, Richar...
FMCAD
2009
Springer
14 years 2 months ago
Industrial strength refinement checking
This paper discusses a methodology used on an industrial hardware development project to validate various cache-coherence protocol components. The idea is to use a high level model...
Jesse D. Bingham, John Erickson, Gaurav Singh, Fle...