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» Formal analysis of hardware requirements
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ICCAD
2003
IEEE
142views Hardware» more  ICCAD 2003»
14 years 6 months ago
SuPREME: Substrate and Power-delivery Reluctance-Enhanced Macromodel Evaluation
The recent demand for system-on-chip RF mixed-signal design and aggressive supply-voltage reduction require chip-level accurate analysis of both the substrate and power delivery s...
Tsung-Hao Chen, Clement Luk, Charlie Chung-Ping Ch...
DATE
2007
IEEE
95views Hardware» more  DATE 2007»
14 years 3 months ago
A multi-core debug platform for NoC-based systems
Network-on-Chip (NoC) is generally regarded as the most promising solution for the future on-chip communication scheme in gigascale integrated circuits. As traditional debug archi...
Shan Tang, Qiang Xu
MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
14 years 2 months ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...
COMPSYSTECH
2007
14 years 1 months ago
Searching the internet for learning materials through didactic indicators
: Internet offers a huge amount of didactic materials that can be used in creating new online courses. However, those materials need a deep analysis to understand their context and...
Marco Alfano, Biagio Lenzitti
ACSD
2006
IEEE
89views Hardware» more  ACSD 2006»
14 years 1 months ago
On process-algebraic verification of asynchronous circuits
Asynchronous circuits have received much attention recently due to their potential for energy savings. Process algebras have been extensively used in the modelling, analysis and sy...
Xu Wang, Marta Z. Kwiatkowska