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» Formal analysis of hardware requirements
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ICECCS
2007
IEEE
89views Hardware» more  ICECCS 2007»
14 years 1 months ago
Just-in-Time Certification
Traditional, standards-based approaches to certification are hugely expensive, of questionable credibility when development is outsourced, and a barrier to innovation. This paper ...
John M. Rushby
ICCAD
1994
IEEE
119views Hardware» more  ICCAD 1994»
14 years 24 days ago
Multi-level network optimization for low power
This paper describes a procedure for minimizing the power consumption in a boolean network under the zero delay model. Power is minimized by modifying the function of each interme...
Sasan Iman, Massoud Pedram
CAV
2004
Springer
108views Hardware» more  CAV 2004»
14 years 1 months ago
Functional Dependency for Verification Reduction
Abstract. The existence of functional dependency among the state variables of a state transition system was identified as a common cause of inefficient BDD representation in formal...
Jie-Hong Roland Jiang, Robert K. Brayton
DAC
2001
ACM
14 years 10 months ago
Automated Pipeline Design
The interlock and forwarding logic is considered the tricky part of a fully-featured pipelined microprocessor and especially debugging these parts delays the hardware design proce...
Daniel Kroening, Wolfgang J. Paul
DATE
2006
IEEE
82views Hardware» more  DATE 2006»
14 years 3 months ago
Performance analysis of greedy shapers in real-time systems
— Traffic shaping is a well-known technique in the area of networking and is proven to reduce global buffer requirements and end-to-end delays in networked systems. Due to these...
Ernesto Wandeler, Alexander Maxiaguine, Lothar Thi...