202 search results - page 4 / 41 » Framework for Fault Analysis and Test Generation in DRAMs |
DDECS
2007
IEEE
14 years 1 months ago
2007
IEEE
- As shown by previous studies, shorts between the interconnect wires should be considered as the predominant cause of failures in CMOS circuits. Fault models and tools for targeti...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
— In this paper, we present a test generation framework for testing of quantum cellular automata (QCA) circuits. QCA is a nanotechnology that has attracted significant recent at...
ECAI
2008
Springer
13 years 9 months ago
2008
Springer
This article formalises the dual problem to model-based diagnosis (MBD), i.e., generating tests to isolate multiple simultaneous faults. Using a standard propositional MBD framewo...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
Test sets that detect each target fault n times (n-detection test sets) are typically generated for restricted values of n due to the increase in test set size with n. We perform ...
ICCD
2008
IEEE
14 years 4 months ago
2008
IEEE
— Extreme scaling practices in silicon technology are quickly leading to integrated circuit components with limited reliability, where phenomena such as early-transistor failures...