571 search results - page 17 / 115 » From Control Flow to Dataflow |
MICRO
1999
IEEE
13 years 11 months ago
1999
IEEE
Branch mispredictions are a major obstacle to exploiting instruction-level parallelism, at least in part because all instructions after a mispredicted branch are squashed. However...
CDC
2008
IEEE
13 years 7 months ago
2008
IEEE
To enable services such as streaming multimedia and voice in multi-hop wireless networks it is necessary to develop algorithms that guarantee Quality of Service (QoS). In this pape...
CORR
2008
Springer
13 years 7 months ago
2008
Springer
This paper is to describe a design and fabrication method for a valve-less peristaltic micro-pump. The valve-less peristaltic micro-pump with three membrane chambers in a serial is...
VLSID
2007
IEEE
14 years 7 months ago
2007
IEEE
We present AHIR, an intermediate representation (IR), that acts as a transition layer between software compilation and hardware synthesis. Such a transition layer is intended to t...
DAC
1998
ACM
13 years 11 months ago
1998
ACM
This paper considers the rate optimal VLSI design of a recursive data flow graph (DFG). Previous research on rate optimal scheduling is not directly applicable to VLSI design. We ...