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ICCAD
1994
IEEE
104views Hardware» more  ICCAD 1994»
14 years 2 months ago
Module selection and data format conversion for cost-optimal DSP synthesis
In high level synthesis each node of a synchronous dataflow graph (DFG) is scheduled to a specific time and allocated to a processor. In this paper we present new integer linear p...
Kazuhito Ito, Lori E. Lucke, Keshab K. Parhi
ARC
2008
Springer
104views Hardware» more  ARC 2008»
14 years 24 days ago
PARO: Synthesis of Hardware Accelerators for Multi-Dimensional Dataflow-Intensive Applications
Abstract. In this paper, we present the PARO design tool for the automated hardware synthesis of massively parallel embedded architectures for given dataflow dominant applications....
Frank Hannig, Holger Ruckdeschel, Hritam Dutta, J&...
DAC
2004
ACM
14 years 2 months ago
Probabilistic regression suites for functional verification
Random test generators are often used to create regression suites on-the-fly. Regression suites are commonly generated by choosing several specifications and generating a number o...
Shai Fine, Shmuel Ur, Avi Ziv
DEBU
2008
100views more  DEBU 2008»
13 years 11 months ago
WAVE: Automatic Verification of Data-Driven Web Services
Data-driven Web services, viewed broadly as interactive systems available on the Web for users and programs, provide the backbone for increasingly complex Web applications. While ...
Alin Deutsch, Victor Vianu
PERCOM
2007
ACM
14 years 10 months ago
Ontology-Directed Generation of Frameworks for Pervasive Service Development
Pervasive computing applications are tedious to develop because they combine a number of problems ranging from device heterogeneity, to middleware constraints, to lack of programm...
Charles Consel, Wilfried Jouve, Julien Lancia, Nic...