165 search results - page 9 / 33 » From the bitstream to the netlist |
DAC
1998
ACM
14 years 8 months ago
1998
ACM
Commercial tools for standard-cell based datapath design are here classed according to design flows, and the advantages of each class are discussed with the results of two test ci...
GLVLSI
2009
IEEE
14 years 2 months ago
2009
IEEE
Logic decomposition has been extensively used to optimize the worst-case delay and the area in the technology independent phase. Bi-decomposition is one of the state-of-art techni...
ISLPED
1997
ACM
13 years 12 months ago
1997
ACM
In this paper1 we propose a novel approach to synthesis for low power under tight timing constraints. Starting from a mapped netlist, we apply a powerful generalized matching algo...
RECOSOC
2007
13 years 9 months ago
2007
A method for inferring latches from combinational loops in a netlist using boolean equations is proposed in this paper. The method takes advantage of the solutions structure of th...
FPGA
2009
ACM
14 years 2 months ago
2009
ACM
Aggressive scaling increases the number of devices we can integrate per square millimeter but makes it increasingly difficult to guarantee that each device fabricated has the inte...