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DAC
2002
ACM
14 years 9 months ago
Software synthesis from synchronous specifications using logic simulation techniques
This paper addresses the problem of automatic generation of implementation software from high-level functional specifications in the context of embedded system on chip designs. So...
Yunjian Jiang, Robert K. Brayton
POPL
2011
ACM
12 years 11 months ago
Decidable logics combining heap structures and data
We define a new logic, STRAND, that allows reasoning with heapmanipulating programs using deductive verification and SMT solvers. STRAND logic (“STRucture ANd Data” logic) f...
P. Madhusudan, Gennaro Parlato, Xiaokang Qiu
CSL
2004
Springer
14 years 2 months ago
Set Constraints on Regular Terms
Set constraints are a useful formalism for verifying properties of programs. Usually, they are interpreted over the universe of finite terms. However, some logic languages allow i...
Pawel Rychlikowski, Tomasz Truderung
PEPM
1993
ACM
14 years 29 days ago
The Correctness of an Optimized Code Generation
For a functional programming language with a lazy standard semantics, we define a strictness analysis by means of abstract interpretation. Using the information from the strictne...
Torben Poort Lange
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
14 years 1 months ago
Synthesis of asynchronous control circuits with automatically generated relative timing assumptions
This paper describes a method of synthesis of asynchronous circuits with relative timing. Asynchronous communication between gates and modules typically utilizes handshakes to ens...
Jordi Cortadella, Michael Kishinevsky, Steven M. B...