79 search results - page 4 / 16 » Functional Verification of Large ASICs |
ICCAD
1996
IEEE
13 years 11 months ago
1996
IEEE
Functional simulation is the most widely used method for design verification. At various levels of abstraction, e.g., behavioral, register-transfer level and gate level, the design...
DAC
1998
ACM
13 years 11 months ago
1998
ACM
—Functional simulation is still the primary workhorse for verifying the functional correctness of hardware designs. Functional verification is necessarily incomplete because it i...
CSFW
2000
IEEE
13 years 10 months ago
2000
IEEE
Schneider's work on rank functions [14] provides a formal approach to verification of certain properties of a security protocol. However, he illustrates the approach only wit...
ISCA
2010
IEEE
13 years 5 months ago
2010
IEEE
Due to their high volume, general-purpose processors, and now chip multiprocessors (CMPs), are much more cost effective than ASICs, but lag significantly in terms of performance a...
IPPS
2008
IEEE
14 years 1 months ago
2008
IEEE
Packet classification is an important function in a router’s line-card. Although many excellent solutions have been proposed in the past, implementing high speed packet classifi...