2076 search results - page 55 / 416 » Functional logic overloading |
ITIIS
2008
13 years 8 months ago
2008
Packet losses tend to occur during short error bursts separated by long periods of relatively error-free transmission. There is also a significant spatial correlation in loss amon...
DAC
2006
ACM
14 years 9 months ago
2006
ACM
or Abstraction for the Functional Verification of FPGAs Guy Dupenloup, Thierry Lemeunier, Roland Mayr Altera Corporation 101 Innovation Drive San Jose, CA 95134 1-408-544-8672 {gdu...
DAC
1998
ACM
14 years 9 months ago
1998
ACM
Abstract-Our strategy for automatic generation of functional vectors is based on exercising selected paths in the given hardware description language (HDL) model. The HDL model des...
CSREAESA
2006
13 years 10 months ago
2006
- This paper presents an approach to obtain reduced hardware and/or delay for synthesizing logic functions using multiplexers. Replication of single control line multiplexer is use...
ICFP
2012
ACM
11 years 11 months ago
2012
ACM
The higher-order logic found in proof assistants such as Coq and various HOL systems provides a convenient setting for the development and verification of pure functional program...