138 search results - page 22 / 28 » Functional test generation for delay faults in combinational... |
ICCAD
1995
IEEE
13 years 11 months ago
1995
IEEE
: We present several techniques for accelerating dynamic vector compaction for combinational and sequential circuits. A key feature of all our techniques is that they significantly...
ICCAD
1997
IEEE
13 years 12 months ago
1997
IEEE
A built-in self-test (BIST) methodology to test system backplanes by using BIST functionality in each of its constituent boards is presented. Since the configurations of systems ...
TCAD
2010
13 years 2 months ago
2010
Crosstalk faults have emerged as a significant mechanism for circuit failure. Long signal nets are of particular concern because they tend to have a higher coupling capacitance to...
TCAD
1998
13 years 7 months ago
1998
—New methods for fault-effect propagation and state justification that use finite-state-machine sequences are proposed for sequential circuit test generation. Distinguishing se...
DAC
2001
ACM
14 years 8 months ago
2001
ACM
We propose a new BDD-based method for decomposition of multi-output incompletely specified logic functions into netlists of two-input logic gates. The algorithm uses the internal ...