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DAC
2002
ACM
14 years 10 months ago
DRG-cache: a data retention gated-ground cache for low power
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
Amit Agarwal, Hai Li, Kaushik Roy
DAC
2005
ACM
14 years 10 months ago
Device and architecture co-optimization for FPGA power reduction
Device optimization considering supply voltage Vdd and threshold voltage Vt tuning does not increase chip area but has a great impact on power and performance in the nanometer tec...
Lerong Cheng, Phoebe Wong, Fei Li, Yan Lin, Lei He
ICML
1999
IEEE
14 years 9 months ago
Least-Squares Temporal Difference Learning
Excerpted from: Boyan, Justin. Learning Evaluation Functions for Global Optimization. Ph.D. thesis, Carnegie Mellon University, August 1998. (Available as Technical Report CMU-CS-...
Justin A. Boyan
ICML
1995
IEEE
14 years 9 months ago
Learning to Make Rent-to-Buy Decisions with Systems Applications
In the single rent-to-buy decision problem, without a priori knowledge of the amount of time a resource will be used we need to decide when to buy the resource, given that we can ...
P. Krishnan, Philip M. Long, Jeffrey Scott Vitter
WWW
2008
ACM
14 years 9 months ago
User oriented link function classification
Currently most link-related applications treat all links in the same web page to be identical. One link-related application usually requires one certain property of hyperlinks but...
Mingliang Zhu, Weiming Hu, Ou Wu, Xi Li, Xiaoqin Z...
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