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SPIN
2004
Springer
14 years 4 months ago
Explicit State Model Checking with Hopper
The Murϕ-based Hopper tool is a general purpose explicit model checker. Hopper leverages Murϕ’s class structure to implement new algorithms. Hopper differs from Murϕ in that i...
Michael Jones, Eric Mercer
ISCA
2010
IEEE
199views Hardware» more  ISCA 2010»
14 years 3 months ago
A case for FAME: FPGA architecture model execution
Given the multicore microprocessor revolution, we argue that the architecture research community needs a dramatic increase in simulation capacity. We believe FPGA Architecture Mod...
Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bi...
RSP
1999
IEEE
122views Control Systems» more  RSP 1999»
14 years 3 months ago
Incremental Compilation for Logic Emulation
Over the past decade, the steady growth rate of FPGA device capacities has enabled the development of multi-FPGA prototyping environments capable of implementing millions of logic...
Russell Tessier
MICRO
1998
IEEE
144views Hardware» more  MICRO 1998»
14 years 3 months ago
Analyzing the Working Set Characteristics of Branch Execution
To achieve highly accurate branch prediction, it is necessary not only to allocate more resources to branch prediction hardware but also to improve the understanding of branch exe...
Sangwook P. Kim, Gary S. Tyson
VISUALIZATION
1997
IEEE
14 years 3 months ago
Application-controlled demand paging for out-of-core visualization
In the area of scientific visualization, input data sets are often very large. In visualization of Computational Fluid Dynamics (CFD) in particular, input data sets today can surp...
Michael Cox, David Ellsworth