694 search results - page 32 / 139 » Gate Sizing Using a Statistical Delay Model |
DATE
2008
IEEE
14 years 3 months ago
2008
IEEE
— The inductance and coupling effects in interconnects and non-linear receiver loads has resulted in complex input signals and output loads for gates in the modern deep submicron...
ASPDAC
2007
ACM
14 years 29 days ago
2007
ACM
Power supply noise increases the circuit delay, which may lead to performance failure of a design. Decoupling capacitance (decap) addition is effective in reducing the power suppl...
ICCAD
2004
IEEE
14 years 5 months ago
2004
IEEE
We address the classic wire-length estimation problem and propose a new statistical wire-length estimation approach that captures the probability distribution function of net leng...
DATE
2010
IEEE
14 years 2 months ago
2010
IEEE
—We present a new technique for statistical static timing analysis (SSTA) based on Markov chain Monte Carlo (MCMC), that allows fast and accurate estimation of the right-hand tai...
ASPDAC
2008
ACM
13 years 11 months ago
2008
ACM
In the nanometer manufacturing region, process variation causes significant uncertainty for circuit performance verification. Statistical static timing analysis (SSTA) is thus dev...