694 search results - page 38 / 139 » Gate Sizing Using a Statistical Delay Model |
DATE
2010
IEEE
14 years 24 days ago
2010
IEEE
Abstract—Supporting Distributed Shared Memory (DSM) is essential for multi-core Network-on-Chips for the sake of reusing huge amount of legacy code and easy programmability. We p...
MICCAI
2000
Springer
14 years 17 days ago
2000
Springer
We present a novel approach to statistical shape analysis of anatomical structures based on small sample size learning techniques. The high complexity of shape models used in medic...
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
— Statistical static timing analysis deals with the increasing variations in manufacturing processes to reduce the pessimism in the worst case timing analysis. Because of the cor...
DAC
2004
ACM
14 years 10 months ago
2004
ACM
Current Static Timing Analysis (STA) techniques allow one to verify the timing of a circuit at different process corners which only consider cases where all the supplies are low o...
IPPS
1998
IEEE
14 years 1 months ago
1998
IEEE
Abstract. The inherently sequential nature of random discrete eventdriven simulation has made parallel and distributed processing di cult. This paper presents a method of applying ...