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ISCAS
2006
IEEE
119views Hardware» more  ISCAS 2006»
14 years 1 months ago
Scheduling and binding for low gate leakage nanoCMOS datapath circuit synthesis
In this paper we present two polynomial time-complexity heuristic algorithms for optimization of gate-oxide leakage (tunneling current) during behavioral synthesis through simulta...
Saraju P. Mohanty, Elias Kougianos, Ramakrishna Ve...
ISQED
2005
IEEE
133views Hardware» more  ISQED 2005»
14 years 1 months ago
Sensitivity-Based Gate Delay Propagation in Static Timing Analysis
This paper presents a methodology for accurate propagation of delay information through a gate for the purpose of static timing analysis (STA) in the presence of noise. Convention...
Shahin Nazarian, Massoud Pedram, Emre Tuncer, Tao ...
ICCAD
2009
IEEE
93views Hardware» more  ICCAD 2009»
13 years 5 months ago
An efficient wakeup scheduling considering resource constraint for sensor-based power gating designs
Power gating has been a very effective way to reduce leakage power. One important design issue for a power gating design is to limit the surge current during the wakeup process. N...
Ming-Chao Lee, Yu-Ting Chen, Yo-Tzu Cheng, Shih-Ch...
SOCC
2008
IEEE
121views Education» more  SOCC 2008»
14 years 1 months ago
Low power 8T SRAM using 32nm independent gate FinFET technology
In this paper, new SRAM cell design methods for FinFET technology are proposed. One of the most important features of FinFET is that the independent front and back gate can be bia...
Young Bok Kim, Yong-Bin Kim, Fabrizio Lombardi
NAR
2007
149views more  NAR 2007»
13 years 7 months ago
UniHI: an entry gate to the human protein interactome
Systematic mapping of protein–protein interactions has become a central task of functional genomics. To map the human interactome, several strategies have recently been pursued....
Gautam Chaurasia, Yasir Iqbal, Christian Häni...