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ISVLSI
2005
IEEE
129views VLSI» more  ISVLSI 2005»
14 years 1 months ago
Reduction of Direct Tunneling Power Dissipation during Behavioral Synthesis of Nanometer CMOS Circuits
— Direct tunneling current is the major component of static power dissipation of a CMOS circuit for technology below 65nm, where the gate dielectric (SiO2) is very low. We intuit...
Saraju P. Mohanty, Ramakrishna Velagapudi, Valmiki...
FPL
1995
Springer
106views Hardware» more  FPL 1995»
13 years 11 months ago
Some Notes on Power Management on FPGA-Based Systems
Although the energy required to perform a logic operation has continuously dropped at least by ten orders of magnitude since early vacuumtube electronics [1], the increasing clock ...
Eduardo I. Boemo, Guillermo González de Riv...
ISCAS
2006
IEEE
133views Hardware» more  ISCAS 2006»
14 years 1 months ago
Neuronal ion-channel dynamics in silicon
Abstract— We present a simple silicon circuit for modelling voltagedependent ion channels found within neural cells, capturing both the gating particle’s sigmoidal activation (...
Kai M. Hynna, Kwabena Boahen
DATE
2007
IEEE
117views Hardware» more  DATE 2007»
14 years 1 months ago
Rapid and accurate latch characterization via direct Newton solution of setup/hold times
Characterizing setup/hold times of latches and registers, a crucial component for achieving timing closure of large digital designs, typically occupies months of computation in in...
Shweta Srivastava, Jaijeet S. Roychowdhury
ISCAS
2007
IEEE
108views Hardware» more  ISCAS 2007»
14 years 1 months ago
Optimal Synthesis of MITE Translinear Loops
— A procedure for synthesizing multiple-input translinear element (MITE) networks that implement a given system of translinear–loop equations (STLE) is presented. The minimum n...
Shyam Subramanian, David V. Anderson, Paul E. Hasl...