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ISLPED
2006
ACM
117views Hardware» more  ISLPED 2006»
14 years 1 months ago
Energy/power breakdown of pipelined nanometer caches (90nm/65nm/45nm/32nm)
As transistors continue to scale down into the nanometer regime, device leakage currents are becoming the dominant cause of power dissipation in nanometer caches, making it essent...
Samuel Rodríguez, Bruce L. Jacob
FPGA
2005
ACM
215views FPGA» more  FPGA 2005»
14 years 1 months ago
Design, layout and verification of an FPGA using automated tools
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...
Ian Kuon, Aaron Egier, Jonathan Rose
ASPLOS
2004
ACM
14 years 27 days ago
Heat-and-run: leveraging SMT and CMP to manage power density through the operating system
Power density in high-performance processors continues to increase with technology generations as scaling of current, clock speed, and device density outpaces the downscaling of s...
Mohamed A. Gomaa, Michael D. Powell, T. N. Vijayku...
GECCO
2004
Springer
164views Optimization» more  GECCO 2004»
14 years 25 days ago
Fuzzy Dominance Based Multi-objective GA-Simplex Hybrid Algorithms Applied to Gene Network Models
Hybrid algorithms that combine genetic algorithms with the Nelder-Mead simplex algorithm have been effective in solving certain optimization problems. In this article, we apply a s...
Praveen Koduru, Sanjoy Das, Stephen Welch, Judith ...
RSP
2003
IEEE
176views Control Systems» more  RSP 2003»
14 years 22 days ago
Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment
This paper describes the early analysis and estimation features currently implemented in the Berkeley Emulation Engine (BEE) system. BEE is an integrated rapid prototyping and des...
Chen Chang, Kimmo Kuusilinna, Brian C. Richards, A...