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DATE
2005
IEEE
115views Hardware» more  DATE 2005»
14 years 1 months ago
Functional Coverage Driven Test Generation for Validation of Pipelined Processors
Functional verification of microprocessors is one of the most complex and expensive tasks in the current system-on-chip design process. A significant bottleneck in the validatio...
Prabhat Mishra, Nikil D. Dutt
ENTCS
2007
108views more  ENTCS 2007»
13 years 7 months ago
Generating Java Compiler Optimizers Using Bidirectional CTL
There have been several research works that analyze and optimize programs using temporal logic. However, no evaluation of optimization time or execution time of these implementati...
Ling Fang, Masataka Sassa
DDECS
2009
IEEE
202views Hardware» more  DDECS 2009»
14 years 2 months ago
Asynchronous two-level logic of reduced cost
— We propose a novel synthesis method of a dual-rail asynchronous two-level logic of reduced cost. It is based on a model that operates under so called modified weak constraints....
Igor Lemberski, Petr Fiser
BMCBI
2011
12 years 11 months ago
A hierarchical Bayesian network approach for linkage disequilibrium modeling and data-dimensionality reduction prior to genome-w
Background: Discovering the genetic basis of common genetic diseases in the human genome represents a public health issue. However, the dimensionality of the genetic data (up to 1...
Raphael Mourad, Christine Sinoquet, Philippe Leray
GECCO
2004
Springer
150views Optimization» more  GECCO 2004»
14 years 1 months ago
Systems Biology Modeling in Human Genetics Using Petri Nets and Grammatical Evolution
Understanding the hierarchical relationships among biochemical, metabolic, and physiological systems in the mapping between genotype and phenotype is expected to improve the diagno...
Jason H. Moore, Lance W. Hahn