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ISCA
2003
IEEE
101views Hardware» more  ISCA 2003»
14 years 1 months ago
Overcoming the Limitations of Conventional Vector Processors
Despite their superior performance for multimedia applications, vector processors have three limitations that hinder their widespread acceptance. First, the complexity and size of...
Christoforos E. Kozyrakis, David A. Patterson
CADE
2000
Springer
14 years 7 days ago
Machine Instruction Syntax and Semantics in Higher Order Logic
Abstract. Proof-carrying code and other applications in computer security require machine-checkable proofs of properties of machine-language programs. These in turn require axioms ...
Neophytos G. Michael, Andrew W. Appel
ISSS
1995
IEEE
100views Hardware» more  ISSS 1995»
13 years 11 months ago
Optimal code generation for embedded memory non-homogeneous register architectures
This paper examines the problem of code-generation for expression trees on non-homogeneous register set architectures. It proposes and proves the optimality of an O(n) algorithm f...
Guido Araujo, Sharad Malik
HPCA
2004
IEEE
14 years 8 months ago
Hardware Support for Prescient Instruction Prefetch
This paper proposes and evaluates hardware mechanisms for supporting prescient instruction prefetch--an approach to improving single-threaded application performance by using help...
Tor M. Aamodt, Paul Chow, Per Hammarlund, Hong Wan...
MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
14 years 1 months ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...