1262 search results - page 28 / 253 » Generating instruction sets and microarchitectures from appl... |
HIPEAC
2007
Springer
14 years 2 months ago
2007
Springer
Caches are designed to provide the best tradeoff between access speed and capacity for a set of target applications. Unfortunately, different applications, and even different phas...
CODES
2005
IEEE
13 years 9 months ago
2005
IEEE
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip memory, which is both time consuming and energy costly. Therefore, minimizing...
ISQED
2002
IEEE
14 years 25 days ago
2002
IEEE
The paper addresses the issue of microprocessor and microcontroller testing, and follows an approach based on the generation of a test program. The proposed method relies on two p...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents an Application Specific Instruction Set Processor (ASIP) design for the implementation of a class of nonlinear image processing algorithms, the Retinex-like fi...
IWSOC
2005
IEEE
14 years 1 months ago
2005
IEEE
Performance estimation of processor is important to select the right processor for an application. Poorly chosen processors can either under perform very badly or over perform but...