Sciweavers

647 search results - page 101 / 130
» Generation of BDDs from hardware algorithm descriptions
Sort
View
NIPS
1996
13 years 9 months ago
Neural Models for Part-Whole Hierarchies
We present a connectionist method for representing images that explicitlyaddresses their hierarchicalnature. It blends data fromneuroscience about whole-object viewpoint sensitive...
Maximilian Riesenhuber, Peter Dayan
TVCG
2012
248views Hardware» more  TVCG 2012»
11 years 10 months ago
Scanning 3D Full Human Bodies Using Kinects
—Depth camera such as Microsoft Kinect, is much cheaper than conventional 3D scanning devices, and thus it can be acquired for everyday users easily. However, the depth data capt...
Jing Tong, Jin Zhou, Ligang Liu, Zhigeng Pan, Hao ...
CODES
2003
IEEE
14 years 1 months ago
Synthesis of real-time embedded software with local and global deadlines
Current methods cannot synthesize real-time embedded software applications when the global deadline of a task is shorter than the total of all local deadlines along a critical pat...
Pao-Ann Hsiung, Cheng-Yi Lin
FPGA
2003
ACM
123views FPGA» more  FPGA 2003»
14 years 1 months ago
Wire type assignment for FPGA routing
The routing channels of an FPGA consist of wire segments of various types providing the tradeoff between performance and routability. In the routing architectures of recently dev...
Seokjin Lee, Hua Xiang, D. F. Wong, Richard Y. Sun
ICCAD
2003
IEEE
170views Hardware» more  ICCAD 2003»
14 years 4 months ago
Evaluation of Placement Techniques for DNA Probe Array Layout
DNA probe arrays have emerged as a core genomic technology that enables cost-effective gene expression monitoring, mutation detection, single nucleotide polymorphism analysis and ...
Andrew B. Kahng, Ion I. Mandoiu, Sherief Reda, Xu ...