647 search results - page 96 / 130 » Generation of BDDs from hardware algorithm descriptions |
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
— Non-Linear Feedback Shift Registers (NLFSRs) have been proposed as an alternative to Linear Feedback Shift Registers (LFSRs) for generating pseudo-random sequences for stream c...
MMB
2012
Springer
12 years 3 months ago
2012
Springer
Abstract. During development, processor architectures can be tuned and configured by many different parameters. For benchmarking, automatic design space explorations (DSEs) with h...
IEEEPACT
2003
IEEE
14 years 1 months ago
2003
IEEE
Modern architecture research relies heavily on detailed pipeline simulation. Simulating the full execution of an industry standard benchmark can take weeks to months to complete. ...
ASPDAC
1998
ACM
14 years 4 days ago
1998
ACM
ABSTRACT - This paper presents a new design flow, FPDSiMPA, and a set of techniques for synthesizing high-performance sub-half micron logic circuits. FPD-SiMPA consists of logic p...
ATS
2010
IEEE
13 years 6 months ago
2010
IEEE
Abstract--To achieve a high product quality for nano-scale systems both realistic defect mechanisms and process variations must be taken into account. While existing approaches for...