44 search results - page 6 / 9 » Generation of Executable Representation for Processor Simula... |
CASES
2007
ACM
13 years 11 months ago
2007
ACM
In this paper we describe the design and implementation of a flexible, and extensible, just-in-time ARM simulator designed to run co-operatively with a multi-core DSP simulator on...
CASES
2008
ACM
13 years 9 months ago
2008
ACM
Various commercial programmable compute platforms have their processor architecture enhanced with field-programmable gate arrays (FPGAs). In a common usage scenario, an applicatio...
DATE
2006
IEEE
14 years 29 days ago
2006
IEEE
Instruction set simulators are common tools used for the development of new architectures and embedded software among countless other functions. This paper presents a framework th...
MICRO
2003
IEEE
14 years 5 days ago
2003
IEEE
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
MICRO
2003
IEEE
14 years 5 days ago
2003
IEEE
A virtual instruction set architecture (V-ISA) implemented via a processor-specific software translation layer can provide great flexibility to processor designers. Recent examp...