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ISLPED
2006
ACM
119views Hardware» more  ISLPED 2006»
14 years 2 months ago
Process variation aware cache leakage management
In a few technology generations, limitations of fabrication processes will make accurate design time power estimates a daunting challenge. Static leakage current which comprises a...
Ke Meng, Russ Joseph
FPGA
2003
ACM
120views FPGA» more  FPGA 2003»
14 years 1 months ago
Architecture evaluation for power-efficient FPGAs
This paper presents a flexible FPGA architecture evaluation framework, named fpgaEVA-LP, for power efficiency analysis of LUT-based FPGA architectures. Our work has several contri...
Fei Li, Deming Chen, Lei He, Jason Cong
DAC
2008
ACM
14 years 9 months ago
Automatic package and board decoupling capacitor placement using genetic algorithms and M-FDM
In the design of complex power distribution networks (PDN) with multiple power islands, it is required that the PDN represents a low impedance as seen by the digital modules. This...
Krishna Bharath, Ege Engin, Madhavan Swaminathan
FPGA
2007
ACM
153views FPGA» more  FPGA 2007»
14 years 2 months ago
GlitchLess: an active glitch minimization technique for FPGAs
This paper describes a technique that reduces dynamic power in FPGAs by reducing the number of glitches in the global routing resources. The technique involves adding programmable...
Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wil...
KBSE
2010
IEEE
13 years 6 months ago
How did you specify your test suite
Although testing is central to debugging and software certification, there is no adequate language to specify test suites over source code. Such a language should be simple and c...
Andreas Holzer, Christian Schallhart, Michael Taut...