Sciweavers

242 search results - page 5 / 49
» Generative Power of CCGs with Generalized Type-Raised Catego...
Sort
View
GECCO
2005
Springer
232views Optimization» more  GECCO 2005»
14 years 1 months ago
Factorial representations to generate arbitrary search distributions
A powerful approach to search is to try to learn a distribution of good solutions (in particular of the dependencies between their variables) and use this distribution as a basis ...
Marc Toussaint
ISLPED
2003
ACM
85views Hardware» more  ISLPED 2003»
14 years 1 months ago
ILP-based optimization of sequential circuits for low power
The power consumption of a sequential circuit can be reduced by decomposing it into subcircuits which can be turned off when inactive. Power can also be reduced by careful state e...
Feng Gao, John P. Hayes
ISPD
2009
ACM
79views Hardware» more  ISPD 2009»
14 years 3 months ago
A routing approach to reduce glitches in low power FPGAs
Glitches (spurious transitions) are common in electronic circuits. In this paper we present a novel approach to reduce dynamic power in FPGAs by reducing glitches during the routi...
Quang Dinh, Deming Chen, Martin D. F. Wong
DAC
2003
ACM
14 years 9 months ago
Clock-tree power optimization based on RTL clock-gating
As power consumption of the clock tree in modern VLSI designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing cl...
Monica Donno, Alessandro Ivaldi, Luca Benini, Enri...
DAC
2007
ACM
14 years 9 months ago
Scan Test Planning for Power Reduction
Many STUMPS architectures found in current chip designs allow disabling of individual scan chains for debug and diagnosis. In a recent paper it has been shown that this feature can...
Christian G. Zoellin, Hans-Joachim Wunderlich, Jen...