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IEEECIT
2005
IEEE
14 years 2 months ago
A Performance and Power Co-optimization Approach for Modern Processors
In embedded systems, performance and power are important inter-related issues that cannot be decoupled. Expensive and extensive simulations in a processor design space are usually...
Yongxin Zhu, Weng-Fai Wong, Cheng-Kok Koh
FPGA
2008
ACM
129views FPGA» more  FPGA 2008»
13 years 10 months ago
Efficient ASIP design for configurable processors with fine-grained resource sharing
Application-Specific Instruction-set Processors (ASIP) can improve execution speed by using custom instructions. Several ASIP design automation flows have been proposed recently. ...
Quang Dinh, Deming Chen, Martin D. F. Wong
DUX
2007
14 years 21 days ago
180 x 120: designing alternate location systems
Using 180 RFID tags to track and plot locations over time, guests to an event at the San Francisco Museum of Modern Art (SFMOMA) collectively constructed a public visualization of...
Eric Paulos, Anthony Burke, Tom Jenkins, Karen Mar...
CONEXT
2007
ACM
14 years 21 days ago
On the cost of caching locator/ID mappings
Very recent activities in the IETF and in the Routing Research Group (RRG) of the IRTG focus on defining a new Internet architecture, in order to solve scalability issues related ...
Luigi Iannone, Olivier Bonaventure
ICCAD
2002
IEEE
141views Hardware» more  ICCAD 2002»
14 years 5 months ago
A hierarchical modeling framework for on-chip communication architectures
— The communication sub-system of complex IC systems is increasingly critical for achieving system performance. Given this, it is important that the on-chip communication archite...
Xinping Zhu, Sharad Malik