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INFOCOM
2003
IEEE
14 years 3 months ago
Algorithms for Computing QoS Paths with Restoration
— There is a growing interest among service providers to offer new services with Quality of Service (QoS) guaranties that are also resilient to failures. Supporting QoS connectio...
Yigal Bejerano, Yuri Breitbart, Rajeev Rastogi, Al...
DATE
2006
IEEE
87views Hardware» more  DATE 2006»
14 years 3 months ago
Thermal resilient bounded-skew clock tree optimization methodology
The existence of non-uniform thermal gradients on the substrate in high performance IC’s can significantly impact the performance of global on-chip interconnects. This issue is...
Ashutosh Chakraborty, Prassanna Sithambaram, Karth...
ISQED
2005
IEEE
98views Hardware» more  ISQED 2005»
14 years 3 months ago
Wire Planning with Bounded Over-the-Block Wires
Hierarchical approach greatly facilitates large-scale chip design by hiding distracting details in low-level objects. However, the lowlevel designs have to have a global view of h...
Hua Xiang, I-Min Liu, Martin D. F. Wong
WADS
2001
Springer
86views Algorithms» more  WADS 2001»
14 years 2 months ago
Practical Approximation Algorithms for Separable Packing Linear Programs
Abstract. We describe fully polynomial time approximation schemes for generalized multicommodity flow problems arising in VLSI applications such as Global Routing via Buffer Block...
Feodor F. Dragan, Andrew B. Kahng, Ion I. Mandoiu,...
ICCAD
1997
IEEE
90views Hardware» more  ICCAD 1997»
14 years 2 months ago
A hierarchical decomposition methodology for multistage clock circuits
† This paper describes a novel methodology to automate the design of the interconnect distribution for multistage clock circuits. We introduce two key ideas. First, a hierarchica...
Gary Ellis, Lawrence T. Pileggi, Rob A. Rutenbar