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FPL
2010
Springer
134views Hardware» more  FPL 2010»
13 years 5 months ago
GPU Versus FPGA for High Productivity Computing
Heterogeneous or co-processor architectures are becoming an important component of high productivity computing systems (HPCS). In this work the performance of a GPU based HPCS is c...
David Huw Jones, Adam Powell, Christos-Savvas Boug...
IPPS
2006
IEEE
14 years 1 months ago
A multiprocessor architecture for the massively parallel model GCA
The GCA (Global Cellular Automata) model consists of a collection of cells which change their states synchronously depending on the states of their neighbors like in the classical...
Wolfgang Heenes, Rolf Hoffmann, Johannes Jendrsczo...
IEEEPACT
1999
IEEE
13 years 11 months ago
A Fully Asynchronous Superscalar Architecture
An asynchronous superscalar architecture is presented based on a novel architectural feature called instruction compounding. This enables efficient dynamic scheduling and forwardi...
D. K. Arvind, Robert D. Mullins
ISVLSI
2008
IEEE
173views VLSI» more  ISVLSI 2008»
14 years 1 months ago
Hermes-GLP: A GALS Network on Chip Router with Power Control Techniques
The evolution of deep submicron technologies allows the development of increasingly complex Systems on a Chip (SoC). However, this evolution is rendering less viable some well-est...
Julian J. H. Pontes, Matheus T. Moreira, Rafael So...
ICCD
1992
IEEE
82views Hardware» more  ICCD 1992»
13 years 11 months ago
A Comparison of Self-Timed Design Using FPGA, CMOS, and GaAs Technologies
Asynchronous or self-timed systems that do not rely on a global clock to keep system components synchronized can offer significant advantages over traditional clocked circuits in ...
Erik Brunvand, Nick Michell, Kent F. Smith