188 search results - page 10 / 38 » Guiding Architectural SRAM Models |
KBSE
2008
IEEE
14 years 1 months ago
2008
IEEE
Evolution of software systems is characterized by inevitable changes of software and increasing software complexity, which in turn may lead to huge maintenance and development cos...
APCSAC
2004
IEEE
13 years 11 months ago
2004
IEEE
The RAMpage hierarchy moves main memory up a level to replace the lowest-level cache by an equivalent-sized SRAM main memory. This paper is a first look at the value of RAMpage to ...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
SEUS
2007
IEEE
14 years 1 months ago
2007
IEEE
In the literature there exist many proposed architectures for sensor fusion applications. This paper briefly reviews some of the most common approaches, i. e., the JDL fusion arch...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Negative bias temperature instability (NBTI) in MOSFETs is one of the major reliability challenges in nano-scale technology. This paper presents an efficient technique to characte...