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ICCD
2006
IEEE
113views Hardware» more  ICCD 2006»
14 years 4 months ago
A theory of Error-Rate Testing
— We have entered an era where chip yields are decreasing with scaling. A new concept called intelligible testing has been previously proposed with the goal of reversing this tre...
Shideh Shahidi, Sandeep Gupta
ICCAD
2007
IEEE
281views Hardware» more  ICCAD 2007»
14 years 4 months ago
Archer: a history-driven global routing algorithm
Global routing is an important step in the physical design process. In this paper, we propose a new global routing algorithm Archer, which resolves some of the most common problem...
Muhammet Mustafa Ozdal, Martin D. F. Wong
ICCAD
2006
IEEE
122views Hardware» more  ICCAD 2006»
14 years 4 months ago
Fill for shallow trench isolation CMP
Shallow trench isolation (STI) is the mainstream CMOS isolation technology. It uses chemical mechanical planarization (CMP) to remove excess of deposited oxide and attain a planar...
Andrew B. Kahng, Puneet Sharma, Alexander Zelikovs...
ICCAD
2006
IEEE
123views Hardware» more  ICCAD 2006»
14 years 4 months ago
A network-flow approach to timing-driven incremental placement for ASICs
We present a novel incremental placement methodology called FlowPlace for significantly reducing critical path delays of placed standard-cell circuits. FlowPlace includes: a) a t...
Shantanu Dutt, Huan Ren, Fenghua Yuan, Vishal Suth...
ICCAD
2004
IEEE
158views Hardware» more  ICCAD 2004»
14 years 4 months ago
DAOmap: a depth-optimal area optimization mapping algorithm for FPGA designs
In this paper we study the technology mapping problem for FPGA architectures to minimize chip area, or the total number of lookup tables (LUTs) of the mapped design, under the chi...
Deming Chen, Jason Cong