This paper presents an efficient method for verifying hazard freedom in timed asynchronous circuits. Timed circuits are a class of asynchronous circuits that utilize explicit tim...
The design and analysis of today’s complex real-time systems requires advanced methods. Due to ever growing functionality, hardware complexity and component interaction, applyin...
The necessity of devising novel thread-level speculation (TLS) techniques has become extremely important with the growing acceptance of multi-core architectures by the industry. H...
A tool is presented that gives a high-level estimation of the power consumed by an analog continuous-time OTA-C filter when given only high-level input parameters such as dynamic ...
Pipeline flushes due to branch mispredictions is one of the most serious problems facing the designer of a deeply pipelined, superscalar processor. Many branch predictors have bee...
Marius Evers, Sanjay J. Patel, Robert S. Chappell,...