398 search results - page 31 / 80 » Hardware Reuse at the Behavioral Level |
CAV
2008
Springer
13 years 10 months ago
2008
Springer
This paper proposes a new approach for proving arithmetic correctness of data paths in System-on-Chip modules. It complements existing techniques which are, for reasons of complexi...
CODES
2006
IEEE
14 years 6 days ago
2006
IEEE
This paper presents a hw/sw codesign methodology based on BORPH, an operating system designed for FPGA-based reconfigurable computers (RC's). By providing native kernel suppo...
ISSS
1995
IEEE
14 years 16 hour ago
1995
IEEE
We present an integrated approach aimed at predicting layout area needed to implement a behavioral description for a given performance goal. Our approach is novel because: (1) it ...
VTS
2005
IEEE
14 years 2 months ago
2005
IEEE
A new method for test resource partitioning is introduced which keeps the design-for-test logic independent of the test set and moves the test pattern dependent information to an ...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
Embedded systems design requires the development of complex HW modules to cope with the most stringent timing constraints of the specifications. This implies the need to update an...