230 search results - page 6 / 46 » Hardware Support for Control Transfers in Code Caches |
HPCA
2011
IEEE
12 years 11 months ago
2011
IEEE
Future CMPs will combine many simple cores with deep cache hierarchies. With more cores, cache resources per core are fewer, and must be shared carefully to avoid poor utilization...
ASPDAC
2004
ACM
14 years 27 days ago
2004
ACM
– This paper presents a high speed VLSI implementation of wavelet and golay error control codes. The design has been fabricated by MOSIS in a TSMC 0.25 µm CMOS process. Experime...
CODES
2007
IEEE
14 years 1 months ago
2007
IEEE
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
MICRO
2003
IEEE
14 years 23 days ago
2003
IEEE
Traditional software controlled data cache prefetching is often ineffective due to the lack of runtime cache miss and miss address information. To overcome this limitation, we imp...
ISCA
2008
IEEE
14 years 1 months ago
2008
IEEE
Flash is a widely used storage device that provides high density and low power, appealing properties for general purpose computing. Today, its usual application is in portable spe...