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DATE
2005
IEEE
97views Hardware» more  DATE 2005»
14 years 1 months ago
Synchronization Processor Synthesis for Latency Insensitive Systems
In this paper we present our contribution in terms of synchronization processor for a SoC design methodology based on the theory of the latency insensitive systems (LIS) of Carlon...
Pierre Bomel, Eric Martin, Emmanuel Boutillon
DFT
2006
IEEE
203views VLSI» more  DFT 2006»
14 years 1 months ago
Self Testing SoC with Reduced Memory Requirements and Minimized Hardware Overhead
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
Ondrej Novák, Zdenek Plíva, Jiri Jen...
CODES
2006
IEEE
13 years 11 months ago
Increasing hardware efficiency with multifunction loop accelerators
To meet the conflicting goals of high-performance low-cost embedded systems, critical application loop nests are commonly executed on specialized hardware accelerators. These loop...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
DATE
2008
IEEE
165views Hardware» more  DATE 2008»
14 years 2 months ago
TinyTimber, Reactive Objects in C for Real-Time Embedded Systems
Embedded systems are often operating under hard real-time constraints. Such systems are naturally described as time-bound reactions to external events, a point of view made manife...
Per Lindgren, Johan Eriksson, Simon Aittamaa, Joha...
ECBS
1996
IEEE
155views Hardware» more  ECBS 1996»
13 years 12 months ago
Model-Integrated Program Synthesis Environment
In this paper, it is shown that, through the use of Model-Integrated Program Synthesis MIPS, parallel real-time implementations of image processing data ows can be synthesized fro...
Janos Sztipanovits, Gabor Karsai, Hubertus Franke